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The channel resistance of an N-channel JFET shown in the figure below is 600 Ω -gate-ece-2011
when the full channel thickness (tch) of 10 mµ is available for conduction. The built-in voltage of the gate P+ N junction (Vbi) is -1 V. When the gate to source
voltage (VGS) is 0 V, the channel is depleted by 1 mµ on each side due to the builtin voltage and hence the thickness available for conduction is only 8 m
The channel resistance when VGS = -3 V is
(A) 360Ω (B) 917Ω (C) 1000Ω (D) 3000Ω
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